makefile execute another target

Question

I have a makefile structured something like this   all        compile executable  clean       rm -f   o   EXEC    I realized that I was consistently running  make clean  followed by  clear  in my terminal before running  make all   I like to have a clean terminal before I try and sift through nasty C   compilation errors  So I tried to add a 3rd target   fresh       rm -f   o   EXEC      clear     make all   This works  however this runs a second instance of make  I believe   Is there a right way to get the same functionality without running a 2nd instance of make

User · Answer

If you removed the make all line from your  fresh  target   fresh       rm -f   o   EXEC      clear   You could simply run the command make fresh all  which will execute as make fresh  make all   Some might consider this as a second instance of make  but it s certainly not a sub-instance of make  a make inside of a make   which is what your attempt seemed to result in

User · Answer

Actually you are right  it runs another instance of make  A possible solution would be   PHONY   clearscr fresh clean all  all       compile executable  clean       rm -f   o   EXEC   fresh   clean clearscr all  clearscr      clear  By calling make fresh you get first the clean target  then the clearscreen which runs clear and finally all which does the job  EDIT Aug 4 What happens in the case of parallel builds with make   s -j option  There s a way of fixing the order  From the make manual  section 4 2   Occasionally  however  you have a situation where you want to impose a specific ordering on the rules to be invoked without forcing the target to be updated if one of those rules is executed  In that case  you want to define order-only prerequisites  Order-only prerequisites can be specified by placing a pipe symbol     in the prerequisites list  any prerequisites to the left of the pipe symbol are normal  any prerequisites to the right are order-only  targets   normal-prerequisites   order-only-prerequisites The normal prerequisites section may of course be empty  Also  you may still declare multiple lines of prerequisites for the same target  they are appended appropriately  Note that if you declare the same file to be both a normal and an order-only prerequisite  the normal prerequisite takes precedence  since they are a strict superset of the behavior of an order-only prerequisite    Hence the makefile becomes  PHONY   clearscr fresh clean all  all       compile executable  clean       rm -f   o   EXEC   fresh     clean clearscr all  clearscr      clear  EDIT Dec 5 It is not a big deal to run more than one makefile instance since each command inside the task will be a sub-shell anyways  But you can have reusable methods using the call function  log success    echo  quot  x1B 32m gt  gt   1 x1B 39m quot   log error     gt  amp 2 echo  quot  x1B 31m gt  gt   1 x1B 39m quot   amp  amp  exit 1   install        quot   AWS PROFILE  quot         call log error   quot AWS PROFILE not set  quot     command1    this line will be a subshell   command2    this line will be another subshell    command3    Use     to hide the command line     call log error   quot It works  yey  quot    uninstall        quot   AWS PROFILE  quot         call log error   quot AWS PROFILE not set  quot              call log error   quot Nuked  quot

[makefile] makefile execute another target

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