How to print out a variable in makefile

Question

In my makefile  I have a variable  NDK PROJECT PATH   my question is how can I print it out when it compiles   I read Make file echo displaying  quot  PATH quot  string and I tried    echo   NDK PROJECT PATH   echo   value NDK PROJECT PATH    Both gives me    build-local mk 102      missing separator   Stop     Any one knows why it is not working for me

User · Answer

You could create a vars rule in your make file, like this:

dispvar = echo $(1)=$($(1)) ; echo

.PHONY: vars
vars:
    @$(call dispvar,SOMEVAR1)
    @$(call dispvar,SOMEVAR2)

There are some more robust ways to dump all variables here: gnu make: list the values of all variables (or "macros") in a particular run.

User · Answer

echo   NDK PROJECT PATH  is the good way to do it  I don t think the error comes from there  Generally this error appears when you mistyped the intendation   I think you have spaces where you should have a tab

User · Answer

from a  Mr  Make post  https   www cmcrossroads com article printing-value-makefile-variable  Add the following rule to your Makefile   print-        echo              Then  if you want to find out the value of a makefile variable  just   make print-VARIABLE   and it will return   VARIABLE   the value of the variable

User · Answer

If you simply want some output  you want to use   info  by itself  You can do that anywhere in a Makefile  and it will show when that line is evaluated     info VAR    VAR      Will output VAR   lt value of VAR gt   whenever make processes that line  This behavior is very position dependent  so you must make sure that the   info  expansion happens AFTER everything that could modify   VAR  has already happened   A more generic option is to create a special rule for printing the value of a variable  Generally speaking  rules are executed after variables are assigned  so this will show you the value that is actually being used   Though  it is possible for a rule to change a variable   Good formatting will help clarify what a variable is set to  and the   flavor  function will tell you what kind of a variable something is  So in this rule   print-        info    is a   flavor     variable set to           true       expands to the stem that the   pattern matched in the rule        expands to the value of the variable whose name is given by by     The   and   clearly delineate the variable expansion  You could also use   and   or similar    flavor     tells you what kind of variable it is  NOTE    flavor  takes a variable name  and not its expansion  So if you say make print-LDFLAGS  you get   flavor LDFLAGS   which is what you want    info text  provides output  Make prints text on its stdout as a side-effect of the expansion  The expansion of   info  though is empty   You can think of it like  echo  but importantly it doesn t use the shell  so you don t have to worry about shell quoting rules   true is there just to provide a command for the rule  Without that  make will also output print-blah is up to date  I feel  true makes it more clear that it s meant to be a no-op    Running it  you get    make print-LDFLAGS LDFLAGS is a recursive variable set to  -L Users

User · Answer

If you don t want to modify the Makefile itself  you can use --eval to add a new target  and then execute the new target  e g   make --eval  print-tests           echo TESTS   TESTS    print-tests   You can insert the required TAB character in the command line using CTRL-V  TAB  example Makefile from above   all  do-something  TESTS  TESTS   a  TESTS   b  TESTS   c   do-something           echo  doing something           echo  running tests   TESTS            exit 1

User · Answer

This can be done in a generic way and can be very useful when debugging a complex makefile  Following the same technique as described in another answer  you can insert the following into any makefile     if the first command line argument is  print  ifeq    firstword   MAKECMDGOALS   print       take the rest of the arguments as variable names   VAR NAMES      wordlist 2   words   MAKECMDGOALS     MAKECMDGOALS        turn them into do-nothing targets     eval   VAR NAMES             then print them    PHONY  print   print               foreach var   VAR NAMES                echo    var        var      endif   Then you can just do  make print  to dump the value of any variable     make print CXXFLAGS CXXFLAGS   -g -Wall

User · Answer

The problem is that echo works only under an execution block  i e  anything after  xx    So anything above the first execution block is just initialization so no execution command can used   So create a execution blocl

User · Answer

if you use android make  mka   echo   NDK PROJECT PATH  will not work and gives you error     missing separator   Stop   use this answer if you are trying to print variables in android make  NDK PROJECT PATH    some value   warning   NDK PROJECT PATH     that worked for me

User · Answer

This makefile will generate the  missing separator  error message   all      echo NDK PROJECT PATH   NDK PROJECT PATH   done           echo  All done    There s a tab before the  echo  All done   though the done  rule and action are largely superfluous   but not before the  echo PATH   PATH    The trouble is that the line starting all should either have a colon   or an equals   to indicate that it is a target line or a macro line  and it has neither  so the separator is missing   The action that echoes the value of a variable must be associated with a target  possibly a dummy or PHONEY target   And that target line must have a colon on it   If you add a   after all in the example makefile and replace the leading blanks on the next line by a tab  it will work sanely   You probably have an analogous problem near line 102 in the original makefile   If you showed 5 non-blank  non-comment lines before the echo operations that are failing  it would probably be possible to finish the diagnosis   However  since the question was asked in May 2013  it is unlikely that the broken makefile is still available now  August 2014   so this answer can t be validated formally   It can only be used to illustrate a plausible way in which the problem occurred

User · Answer

You can print out variables as the makefile is read  assuming GNU make as you have tagged this question appropriately  using this method  with a variable named  var       info   var is    var      You can add this construct to any recipe to see what make will pass to the shell    PHONY  all all      info   var is    var   echo Hello world   Now  what happens here is that make stores the entire recipe    info   var is    var   echo Hello world  as a single recursively expanded variable  When make decides to run the recipe  for instance when you tell it to build all   it expands the variable  and then passes each resulting line separately to the shell   So  in painful detail    It expands   info   var is    var   echo Hello world To do this it first expands   info   var is    var         becomes literal     var  becomes  -   say  The side effect is that  var is   -   appears on standard out The expansion of the   info     though is empty  Make is left with echo Hello world   Make prints echo Hello world on stdout first to let you know what it s going to ask the shell to do  The shell prints Hello world on stdout

User · Answer

As per the GNU Make manual and also pointed by  bobbogo  in the below answer   you can use info   warning   error to display text     error   text       warning text       info    text       To print variables     error   VAR is   VAR     warning VAR is   VAR     info    VAR is   VAR      error  would stop the make execution  after showing the error string

User · Answer

All versions of make require that command lines be indented with a TAB  not space  as the first character in the line   If you showed us the entire rule instead of just the two lines in question we could give a clearer answer  but it should be something like   myTarget  myDependencies          echo hi   where the first character in the second line must be TAB

User · Answer

No need to modify the Makefile     cat printvars mak print-            echo               cd  to Makefile dir   make -f   printvars mak -f Makefile print-VARIABLE

User · Answer

Run make -n  it shows you the value of the variable    Makefile     all           echo   NDK PROJECT PATH    Command   export NDK PROJECT PATH  opt ndk project make -n    Output   echo  opt ndk project

User · Answer

I usually echo with an error if I wanted to see the variable value  Only if you wanted to see the value  It will stop execution        echo   error NDK PROJECT PATH    NDK PROJECT PATH

[makefile] How to print out a variable in makefile

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