Indexing vectors and arrays with

Question

I am seeing a code in SystemVerilog which has something like this   if address 2 pointer  2     do something    How should I understand the    when indexing this vector   I found that it is called bit slicing  but I can t find an explanation about it

User · Answer

This is another way to specify the range of the bit-vector.

x +: N, The start position of the vector is given by x and you count up from x by N.

There is also

x -: N, in this case the start position is x and you count down from x by N.

N is a constant and x is an expression that can contain iterators.

It has a couple of benefits -

It makes the code more readable.
You can specify an iterator when referencing bit-slices without getting a "cannot have a non-constant value" error.

User · Answer

Description and examples can be found in IEEE Std 1800-2017  sect  11 5 1  Vector bit-select and part-select addressing   First IEEE appearance is IEEE 1364-2001  Verilog   sect  4 2 1  Vector bit-select and part-select addressing   Here is an direct example from the LRM    logic  31  0  a vect  logic  0  31  b vect  logic  63  0  dword  integer sel  a vect  0    8        a vect  7   0  a vect 15 -  8        a vect 15   8  b vect  0    8        b vect 0   7  b vect 15 -  8        b vect 8  15  dword 8 sel    8     variable part-select with fixed width    If sel is 0 then dword 8  0     8     dword 7 0  If sel is 7 then dword 8  7     8     dword 63 56   The value to the left always the starting index  The number to the right is the width and must be a positive constant  the   and - indicates to select the bits of a higher or lower index value then the starting index   Assuming address is in little endian   msb lsb   format  then if address 2 pointer  2   is the equivalent of if  address 2 pointer 1  address 2 pointer

[system-verilog] Indexing vectors and arrays with +:

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