Write-back vs Write-Through caching

Question

My understanding is that the main difference between the two methods is that in  write-through  method data is written to the main memory through the cache immediately  while in  write-back  data is written in a  latter time    We still need to wait for the memory in  latter time  so What is the benefit of  write-through

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maybe this article can help you link here

Write-through: Write is done synchronously both to the cache and to the backing store.

Write-back (or Write-behind): Writing is done only to the cache. A modified cache block is written back to the store, just before it is replaced.

Write-through: When data is updated, it is written to both the cache and the back-end storage. This mode is easy for operation but is slow in data writing because data has to be written to both the cache and the storage.

Write-back: When data is updated, it is written only to the cache. The modified data is written to the back-end storage only when data is removed from the cache. This mode has fast data write speed but data will be lost if a power failure occurs before the updated data is written to the storage.

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The benefit of write-through to main memory is that it simplifies the design of the computer system   With write-through  the main memory always has an up-to-date copy of the line   So when a read is done  main memory can always reply with the requested data   If write-back is used  sometimes the up-to-date data is in a processor cache  and sometimes it is in main memory   If the data is in a processor cache  then that processor must stop main memory from replying to the read request  because the main memory might have a stale copy of the data   This is more complicated than write-through   Also  write-through can simplify the cache coherency protocol because it doesn t need the Modify state   The Modify state records that the cache must write back the cache line before it invalidates or evicts the line   In write-through a cache line can always be invalidated without writing back since memory already has an up-to-date copy of the line   One more thing - on a write-back architecture software that writes to memory-mapped I O registers must take extra steps to make sure that writes are immediately sent out of the cache   Otherwise writes are not visible outside the core until the line is read by another processor or the line is evicted

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Write-Back is a more complex one and requires a complicated Cache Coherence Protocol MOESI  but it is worth it as it makes the system fast and efficient   The only benefit of Write-Through is that it makes the implementation extremely simple and no complicated cache coherency protocol is required

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Let s look at this with the help of an example   Suppose we have a direct mapped cache and the write back policy is used  So we have a valid bit  a dirty bit  a tag and a data field in a cache line   Suppose we have an operation   write A   where A is mapped to the first line of the cache    What happens is that the data A  from the processor gets written to the first line of the cache  The valid bit and tag bits are set  The dirty bit is set to 1    Dirty bit simply indicates was the cache line ever written since it was last brought into the cache   Now suppose another operation is performed   read E where E is also mapped to the first cache line   Since we have direct mapped cache  the first line can simply be replaced by the E block which will be brought from memory  But since the block last written into the line  block A  is not yet written into the memory indicated by the dirty bit   so the cache controller will first issue a write back to the memory to transfer the block A to memory  then it will replace the line with block E by issuing a read operation to the memory  dirty bit is now set to 0    So write back policy doesnot guarantee that the block will be the same in memory and its associated cache line  However whenever the line is about to be replaced  a write back is performed at first    A write through policy is just the opposite  According to this  the memory will always have a up-to-date data  That is  if the cache block is written  the memory will also be written accordingly   no use of dirty bits

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Write-back and write-through describe policies when a write hit occurs  that is when the cache has the requested information  In these examples  we assume a single processor is writing to main memory with a cache   Write-through  The information is written to the cache and memory  and the write finishes when both have finished  This has the advantage of being simpler to implement  and the main memory is always consistent  in sync  with the cache  for the uniprocessor case - if some other device modifies main memory  then this policy is not enough   and a read miss never results in writes to main memory  The obvious disadvantage is that every write hit has to do two writes  one of which accesses slower main memory   Write-back  The information is written to a block in the cache  The modified cache block is only written to memory when it is replaced  in effect  a lazy write   A special bit for each cache block  the dirty bit  marks whether or not the cache block has been modified while in the cache  If the dirty bit is not set  the cache block is  clean  and a write miss does not have to write the block to memory   The advantage is that writes can occur at the speed of the cache  and if writing within the same block only one write to main memory is needed  when the previous block is being replaced   The disadvantages are that this protocol is harder to implement  main memory can be not consistent  not in sync  with the cache  and reads that result in replacement may cause writes of dirty blocks to main memory    The policies for a write miss are detailed in my first link    These protocols don t take care of the cases with multiple processors and multiple caches  as is common in modern processors  For this  more complicated cache coherence mechanisms are required  Write-through caches have simpler protocols since a write to the cache is immediately reflected in memory    Good resources     http   web cs iastate edu  prabhu Tutorial CACHE interac html  what my post is largely based on  http   www cs cornell edu courses cs3410 2013sp lecture 18-caches3-w pdf

[caching] Write-back vs Write-Through caching?

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